25 #ifndef __RTCAN_MSCAN_REGS_H_
26 #define __RTCAN_MSCAN_REGS_H_
28 #include <linux/version.h>
29 #include <linux/of_platform.h>
30 #include <asm/mpc52xx.h>
32 static inline void __iomem *mpc5xxx_gpio_find_and_map(
void)
34 struct device_node *ofn;
35 ofn = of_find_compatible_node(NULL, NULL,
"mpc5200-gpio");
37 ofn = of_find_compatible_node(NULL, NULL,
"fsl,mpc5200-gpio");
38 return ofn ? of_iomap(ofn, 0) : NULL;
41 #define MPC5xxx_GPIO mpc5xxx_gpio_find_and_map()
42 #define mpc5xxx_gpio mpc52xx_gpio
44 #define mpc5xxx_get_of_node(ofdev) (ofdev)->dev.of_node
46 #define MSCAN_CAN1_ADDR (MSCAN_MBAR + 0x0900)
47 #define MSCAN_CAN2_ADDR (MSCAN_MBAR + 0x0980)
48 #define MSCAN_SIZE 0x80
51 #define MSCAN_RXFRM 0x80
52 #define MSCAN_RXACT 0x40
53 #define MSCAN_CSWAI 0x20
54 #define MSCAN_SYNCH 0x10
55 #define MSCAN_TIME 0x08
56 #define MSCAN_WUPE 0x04
57 #define MSCAN_SLPRQ 0x02
58 #define MSCAN_INITRQ 0x01
61 #define MSCAN_CANE 0x80
62 #define MSCAN_CLKSRC 0x40
63 #define MSCAN_LOOPB 0x20
64 #define MSCAN_LISTEN 0x10
65 #define MSCAN_WUPM 0x04
66 #define MSCAN_SLPAK 0x02
67 #define MSCAN_INITAK 0x01
70 #define MSCAN_WUPIF 0x80
71 #define MSCAN_CSCIF 0x40
72 #define MSCAN_RSTAT1 0x20
73 #define MSCAN_RSTAT0 0x10
74 #define MSCAN_TSTAT1 0x08
75 #define MSCAN_TSTAT0 0x04
76 #define MSCAN_OVRIF 0x02
77 #define MSCAN_RXF 0x01
80 #define MSCAN_WUPIE 0x80
81 #define MSCAN_CSCIE 0x40
82 #define MSCAN_RSTATE1 0x20
83 #define MSCAN_RSTATE0 0x10
84 #define MSCAN_TSTATE1 0x08
85 #define MSCAN_TSTATE0 0x04
86 #define MSCAN_OVRIE 0x02
87 #define MSCAN_RXFIE 0x01
90 #define MSCAN_TXE2 0x04
91 #define MSCAN_TXE1 0x02
92 #define MSCAN_TXE0 0x01
93 #define MSCAN_TXE (MSCAN_TXE2 | MSCAN_TXE1 | MSCAN_TXE0)
96 #define MSCAN_TXIE2 0x04
97 #define MSCAN_TXIE1 0x02
98 #define MSCAN_TXIE0 0x01
99 #define MSCAN_TXIE (MSCAN_TXIE2 | MSCAN_TXIE1 | MSCAN_TXIE0)
102 #define MSCAN_ABTRQ2 0x04
103 #define MSCAN_ABTRQ1 0x02
104 #define MSCAN_ABTRQ0 0x01
107 #define MSCAN_ABTAK2 0x04
108 #define MSCAN_ABTAK1 0x02
109 #define MSCAN_ABTAK0 0x01
112 #define MSCAN_TX2 0x04
113 #define MSCAN_TX1 0x02
114 #define MSCAN_TX0 0x01
117 #define MSCAN_IDAM1 0x20
118 #define MSCAN_IDAM0 0x10
119 #define MSCAN_IDHIT2 0x04
120 #define MSCAN_IDHIT1 0x02
121 #define MSCAN_IDHIT0 0x01
123 struct mscan_msgbuf {
124 volatile u8 idr[0x8];
125 volatile u8 dsr[0x10];
150 volatile u8 cantbsel;
152 volatile u16 rsrv6[3];
153 volatile u8 canrxerr;
154 volatile u8 cantxerr;
156 volatile u8 canidar0;
157 volatile u8 canidar1;
159 volatile u8 canidar2;
160 volatile u8 canidar3;
162 volatile u8 canidmr0;
163 volatile u8 canidmr1;
165 volatile u8 canidmr2;
166 volatile u8 canidmr3;
168 volatile u8 canidar4;
169 volatile u8 canidar5;
171 volatile u8 canidar6;
172 volatile u8 canidar7;
174 volatile u8 canidmr4;
175 volatile u8 canidmr5;
177 volatile u8 canidmr6;
178 volatile u8 canidmr7;
181 struct mscan_msgbuf canrxfg;
182 struct mscan_msgbuf cantxfg;
187 #define MSCAN_CLKSRC_BUS 0
188 #define MSCAN_CLKSRC_XTAL MSCAN_CLKSRC
189 #define MSCAN_CLKSRC_IPS MSCAN_CLKSRC
193 #define MSCAN_BUF_STD_RTR 0x10
194 #define MSCAN_BUF_EXT_RTR 0x01
195 #define MSCAN_BUF_EXTENDED 0x08
197 #define MSCAN_IDAM1 0x20
199 #define MSCAN_RIER (MSCAN_OVRIE | \
208 #define BTR0_BRP_MASK 0x3f
209 #define BTR0_SJW_SHIFT 6
210 #define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT)
212 #define BTR1_TSEG1_MASK 0xf
213 #define BTR1_TSEG2_SHIFT 4
214 #define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT)
215 #define BTR1_SAM_SHIFT 7
217 #define BTR0_SET_BRP(brp) (((brp) - 1) & BTR0_BRP_MASK)
218 #define BTR0_SET_SJW(sjw) ((((sjw) - 1) << BTR0_SJW_SHIFT) & \
221 #define BTR1_SET_TSEG1(tseg1) (((tseg1) - 1) & BTR1_TSEG1_MASK)
222 #define BTR1_SET_TSEG2(tseg2) ((((tseg2) - 1) << BTR1_TSEG2_SHIFT) & \
224 #define BTR1_SET_SAM(sam) (((sam) & 1) << BTR1_SAM_SHIFT)