35 #ifndef _E1000_OSDEP_H_
36 #define _E1000_OSDEP_H_
38 #include <linux/types.h>
39 #include <linux/pci.h>
40 #include <linux/delay.h>
42 #include <linux/interrupt.h>
43 #include <linux/sched.h>
46 #define usec_delay(x) udelay(x)
48 #define msec_delay(x) do { if(in_interrupt()) { \
60 #define msec_delay_irq(x) mdelay(x)
63 #define PCI_COMMAND_REGISTER PCI_COMMAND
64 #define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
73 #define MSGOUT(S, A, B) printk(KERN_DEBUG S "\n", A, B)
76 #define DEBUGOUT(S) printk(KERN_DEBUG S "\n")
77 #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A)
80 #define DEBUGOUT1(S, A...)
83 #define DEBUGFUNC(F) DEBUGOUT(F)
84 #define DEBUGOUT2 DEBUGOUT1
85 #define DEBUGOUT3 DEBUGOUT2
86 #define DEBUGOUT7 DEBUGOUT3
89 #define E1000_BIG_ENDIAN __BIG_ENDIAN
92 #define E1000_WRITE_REG(a, reg, value) ( \
93 writel((value), ((a)->hw_addr + \
94 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg))))
96 #define E1000_READ_REG(a, reg) ( \
97 readl((a)->hw_addr + \
98 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg)))
100 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
101 writel((value), ((a)->hw_addr + \
102 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
105 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
106 readl((a)->hw_addr + \
107 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
110 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
111 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
113 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
114 writew((value), ((a)->hw_addr + \
115 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
118 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
119 readw((a)->hw_addr + \
120 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
123 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
124 writeb((value), ((a)->hw_addr + \
125 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
128 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
129 readb((a)->hw_addr + \
130 (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
133 #define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, STATUS)
135 #define E1000_WRITE_ICH8_REG(a, reg, value) ( \
136 writel((value), ((a)->flash_address + reg)))
138 #define E1000_READ_ICH8_REG(a, reg) ( \
139 readl((a)->flash_address + reg))
141 #define E1000_WRITE_ICH8_REG16(a, reg, value) ( \
142 writew((value), ((a)->flash_address + reg)))
144 #define E1000_READ_ICH8_REG16(a, reg) ( \
145 readw((a)->flash_address + reg))