--- gdb-5.2.1-mpcbdm/gdb/mpcbdm.c	Wed Oct 15 23:41:24 2003
+++ gdb-5.2.1-mpcbdm-wiggler/gdb/mpcbdm.c	Thu Oct 16 00:03:33 2003
@@ -387,6 +387,139 @@
 		printf_filtered("Port active lines: %s\n",PP.sStatus);
 }
 
+int PortReadV3(void)
+{
+	INB(PP.STAT,PP.STATAddr);
+	PP.STAT ^= PP.DSDO;	/* DSDO is inverted at Wiggler, v. w. */ 
+	return PP.STAT;
+}
+
+void PortPowerV3(unsigned char Power)
+{
+	if (Power) /* turn power on? */
+	{
+		PP.POWER = 0x74; /* set mask for power lines */   //j era f8
+		OUTB((PP.DATA | PP.POWER), PP.DATAAddr);
+	}
+	else /* turn power off */
+	{
+		PP.POWER = 0x00; /* reset mask for power lines */
+		PP.DATA=PP.DATA & (~0x74);	//j era f8 
+						// v. w.: really 0xf4, not 0x74 here???
+		OUTB(PP.DATA, PP.DATAAddr);
+	}
+        printf_filtered("Power: ");
+	return;
+}
+
+void PortWriteV3(unsigned char Data)
+{
+	PP.DATA = Data;
+	OUTB( (Data | PP.POWER | PP.HRESET), PP.DATAAddr); /* keep HRESET high */
+   	bdm_delay( mpcbdm_delay);
+	if( (mpcbdm_verbose != INT_MAX) && (mpcbdm_verbose&VERBOSE_BDM))
+	{
+		printf_filtered("Write: ");
+		PP.Status();
+	}
+}
+
+void PortResetV3(unsigned char Data)
+{
+	PP.DATA = Data;         //j 
+	OUTB( (Data | PP.DSCK), PP.DATAAddr);        //j era cntrl
+	if ((mpcbdm_verbose != INT_MAX) && (mpcbdm_verbose&VERBOSE_BDM))
+	{
+		printf_filtered("Reset: ");
+		PP.Status();
+	}
+        printf_filtered("Reset: ");
+}
+
+void PortStatusV3(void)
+{
+	int i;
+	int l;
+
+	INB(PP.DATA, PP.DATAAddr);
+	INB(PP.STAT, PP.STATAddr);
+	INB(PP.CTRL, PP.CTRLAddr);
+
+	i = 0;
+
+	if (!(mpcbdm_verbose&VERBOSE_BDM)) /* called from user via port command */
+		printf_filtered("PortStatusV3: DATA=0x%02X STAT=0x%02X CTRL=0x%02X\n",PP.DATA,PP.STAT,PP.CTRL);
+
+	sprintf(&(PP.sStatus[i]),"out: %n",&l);
+	i += l;
+	if (PP.DATA & PP.HRESET)
+	{
+		sprintf(&(PP.sStatus[i]),"HRESET %n",&l);
+		i += l;
+	}
+	if (PP.CTRL & PP.SRESET)
+	{
+		sprintf(&(PP.sStatus[i]),"SRESET %n",&l);
+		i += l;
+	}
+	if (PP.CTRL & PP.TRST)
+	{
+		sprintf(&(PP.sStatus[i]),"TRST %n",&l);
+		i += l;
+	}
+	if (PP.DATA & PP.DSCK)
+	{
+		sprintf(&(PP.sStatus[i]),"DSCK %n",&l);
+		i += l;
+	}
+	if (PP.DATA & PP.DSDI)
+	{
+		sprintf(&(PP.sStatus[i]),"DSDI %n",&l);
+		i += l;
+	}
+	if (PP.DATA & PP.TMS)
+	{
+		sprintf(&(PP.sStatus[i]),"TMS %n",&l);
+		i += l;
+	}
+	if (PP.DATA & PP.POWER)
+	{
+		sprintf(&(PP.sStatus[i]),"POWER %n",&l);
+		i += l;
+	}
+	sprintf(&(PP.sStatus[i]),"\tin: %n",&l);
+	i += l;
+	if (PP.STAT & PP.VFLS0)
+	{
+		sprintf(&(PP.sStatus[i]),"VFLS0 %n",&l);
+		i += l;
+	}
+	if (PP.STAT & PP.VFLS1)
+	{
+		sprintf(&(PP.sStatus[i]),"VFLS1 %n",&l);
+		i += l;
+	}
+	if (PP.STAT & PP.VDD1)
+	{
+		sprintf(&(PP.sStatus[i]),"VDD1 %n",&l);
+		i += l;
+	}
+	if (PP.STAT & PP.VDD2)
+	{
+		sprintf(&(PP.sStatus[i]),"VDD2 %n",&l);
+		i += l;
+	}
+	if (PP.STAT & PP.DSDO)
+	{
+		sprintf(&(PP.sStatus[i]),"DSD0 %n",&l);
+		i += l;
+	}
+	if (mpcbdm_verbose&VERBOSE_BDM) /* debug BDM protocol: be a little more compact */
+		printf_filtered("%s\n",PP.sStatus);
+	else /* or called from user via port command */
+		printf_filtered("Port active lines: %s\n",PP.sStatus);
+}
+
 void PortError(unsigned char Data)
 {
 	if (mpcbdm_verbose&VERBOSE_BDM)
@@ -531,6 +664,36 @@
 
 		PP.FREEZE	= PP.VFLS0 | PP.VFLS1;
 		break;
+	case 3: /* Macraigor Wiggler */
+		mpcbdm_sleep = 25000;	/*J ERA 10 VEZES MAIOR sleep 0.025 seconds between FRZ polls*/
+		PP.Read = PortReadV3;
+		PP.Power = PortPowerV3;
+		PP.Write = PortWriteV3;
+		PP.Reset = PortResetV3;
+		PP.Status = PortStatusV3;
+
+                //nova definição da paralela wiggler j 
+                //data
+                PP.DSDI		= 0x01;
+                PP.DSCK         = 0x02;
+                PP.HRESET	= 0x08; //mudou de registrador, era no ctrl
+                PP.TMS		= 0x00;
+                PP.SRESET	= 0x00;
+		PP.POWER 	= 0x74;
+
+                //stat
+                PP.VDD1		= 0x10;
+                PP.VDD2		= 0x10;
+                PP.VFLS0	= 0x40;
+                PP.VFLS1	= 0x40;
+                PP.DSDO		= 0x80;
+	        PP.FREEZE	= PP.VFLS0 | PP.VFLS1;
+
+                //contrl
+		PP.TRST		= 0x01;
+		mpcbdm_power    = 0;	//pra chamar PP.Power -- compatibilidade com wiggler MCgraigor
+
+		break;
 	default:
 		printf_filtered("invalid adapter version %d specified\n",mpcbdm_adapter);
 		return RETURN_FAIL;
@@ -673,6 +836,10 @@
 		{
 			PP.Write(bit); /* relaxed BDM port timing */
 		}
+		if (mpcbdm_adapter == 3)
+		{	PP.Write(bit);
+			PP.Write(bit | PP.DSCK);
+		}
 		PP.Write(bit | PP.DSCK); /* clock DSCK High after setting data bit on DSDI*/
 		PP.Write(bit); /*clock DSCK low for reading DSDO next */
 		word <<= 1;
@@ -739,6 +906,10 @@
 		{
 			PP.Write(bit); /* relaxed BDM port timing */
 		}
+		if( mpcbdm_adapter == 3)
+		{	PP.Write(bit);
+			PP.Write(bit | PP.DSCK); /* output bit with high clock*/
+		}
 		PP.Write(bit | PP.DSCK); /* output bit with high clock*/
 		PP.Write(bit); /*clock DSCK low for reading DSDO*/
 		word <<= 1;
@@ -1380,14 +1551,21 @@
 /* Note: I added HRESET here, because sometimes only SRESET
  didn't bring the processor in a stable state. So I completely removed
  ppc_bdm_reset. But I'm not shure I broke something here...*/
- 	PP.Reset(PP.HRESET|PP.SRESET);
+	if( mpcbdm_adapter != 3)	/* v. w. */
+ 		PP.Reset(PP.HRESET|PP.SRESET);
 /* hold reset for some while, since here occured some problems with fast CPUs*/
 	usleep(mpcbdm_sleep);
 /* release H&SRESET, hold DSCK, /DSDI: immediate Debug Mode, asynchr. clocked*/
 	PP.Reset(0x00);
 /* we have to hold DSDI low for at least eight MPC cycles*/
 	usleep(mpcbdm_sleep);
+	if( mpcbdm_adapter == 3)	/* v. w. */
+		PP.Write(PP.HRESET | PP.DSCK); /* j */
+
 	WaitFreeze();
+	if( mpcbdm_adapter == 3)	/* v. w. */
+        	usleep(mpcbdm_sleep);   //j 
+
 	LastMSR = bdm_getspr(SPR_SRR1);
 	if (mpcbdm_verbose&VERBOSE_SRR1)
 	{
